ADE7518
3.3 V PERIPHERALS AND WAKE-UP EVENTS
Some of the 3.3 V peripherals are capable of waking the ADE7518
from PSM2. The events that can cause the ADE7518 to wake up
from PSM2 are listed in the Wake-Up Event column in Table 27.
Table 27. 3.3 V Peripherals and Wake-Up Events
The interrupt flag associated with these events must be cleared
prior to executing instructions that put the ADE7518 in PSM2
mode after wake-up.
3.3 V
Wake-Up
Wake-Up
Interrupt
Peripheral
Power Supply
Event
PSR
Enable Bits
Nonmaskable
Flag
PSR
Vector
IPSM
Comments
The ADE7518 wakes up if the power supply is restored (if
Management
V SWOUT switches to be connected to V DD ). The VSWSOURCE
flag, Bit 6 of the Peripheral Configuration SFR (PERIPH, 0xF4),
is set to indicate that V SWOUT is connected to V DD .
RTC
Midnight
Nonmaskable
Midnight
IRTC
The ADE7518 wakes up at midnight every day to update its
calendars. The RTC interrupt needs to be serviced and
acknowledged prior to entering PSM2 mode.
Alarm
Maskable
Alarm
IRTC
An alarm can be set to wake the ADE7518 after the desired
amount of time. The RTC alarm is enabled by setting the
ALARM bit in the RTC Configuration SFR (TIMECON, 0xA1).
The RTC interrupt needs to be serviced and acknowledged
prior to entering PSM2 mode.
I/O Ports 1
INT0
INT0PRG = 1
IE0
The edge of the interrupt is selected by Bit IT0 in the TCON
register. The IE0 flag bit in the TCON register is not affected.
The Interrupt 0 interrupt needs to be serviced and
acknowledged prior to entering PSM2 mode.
INT1
INT1PRG[2:0] =
11x
IE1
The edge of the interrupt is selected by Bit IT1 in the TCON
register. The IE1 flag bit in the TCON register is not affected.
The Interrupt 1 interrupt needs to be serviced and
acknowledged prior to entering PSM2 mode.
Rx Edge
RXPROG[1:0] =
11
PERIPH[7]
(RXFLAG)
An Rx edge event occurs if a rising or falling edge is detected
on the Rx line. The UART RxD flag needs to be cleared prior
to entering PSM2 mode.
External Reset
RESET
Nonmaskable
If the RESET pin is brought low while the ADE7518 is in
PSM2, the ADE7518 wakes up to PSM1.
LCD
Scratch Pad
The LCD can be enabled/disabled in PSM2. The LCD data
memory remains intact.
The four SCRATCHx registers remain intact in PSM2.
1
All I/O pins are treated as inputs. The weak pull-up on each I/O pin can be disabled individually in the Port 0 Weak Pull-Up Enable SFR (PINMAP0, 0xB2), Port 1 Weak
Pull-Up Enable SFR (PINMAP1, 0xB3), and Port 2 Weak Pull-Up Enable SFR (PINMAP2, 0xB4) to decrease current consumption. The interrupts can be enabled/disabled.
Rev. 0 | Page 31 of 128
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